1. Field of the Invention
The present invention relates to storing code into memory. More specifically, the present invention relates to structuring code to reduce layout conflicts between code units with a caller-callee relationship.
2. Description of the Related Art
Attempts to address the increasing gap between processors and memory have typically leaned towards reducing or tolerating latency. Techniques for reducing or tolerating latency include prefetching, dynamic instruction scheduling, and speculative execution. The tendency for application to be dominated by memory accesses limits the effectiveness of such techniques.
A more recent approach attempts to improve software reference locality. Software reference locality is improved by engineering code layout organization, referred to as code placement, during compile-time. Such techniques organize code in accordance with gathered profile information that indicates “hotness,” of code blocks, or execution frequency, to reduce cache conflicts. The code-placement techniques reorganize an application at various levels of granularity based on a weighted graph. The weighted graph is constructed from profile information that indicates how often a code block is called. Although execution frequency is helpful, no code placement technique utilizes information indicating caller-callee relationships. Accordingly, a technique is desired that utilizes information pertaining to procedures that reference each other.